This invention relates to semiconductor memory devices, and more particularly to an N-channel silicon gate MOS read only memory and a process for making it.
Semiconductor memory devices are widely used in the manufacture of digital equipment, particularly minicomputers and microprocessor systems. Often bulk storage of fixed programs is provided by MOS read only memory devices or "ROMs". The economies of manufacture of these devices, and of mounting them on circuit boards in the system, are such that the number of memory bits per semiconductor chip is advantageously as high as possible. ROMs of 8K and 16K sizes are typical, these referring to 8192 or 16384 bits per chip. This dictates that cell sizes for the storage cells of the ROM be quite small. P-channel ROMs of this size can be relatively easily fabricated in the manner set forth in U.S. Pat. No. 3,541,543, assigned to Texas Instruments. However, most microprocessor and computer parts are now made by the N-channel silicon gate process because of the shorter access times provided. The N-channel process is not favorable to layout of ROM cells of small size. Previous cells have required contact areas between metal or polysilicon lines and the semiconductor material, using excessive space on the chip. Also, metal leads have been used in the array, which introduces unwanted capacitance. Other cells have required processing not compatible with standard manufacturing techniques.
It is the principal object of this invention to provide a semiconductor memory cell of small size which does not require contact areas in the ROM storage cell array. Another object is to provide a small-area N-channel MOS ROM cell which is made by a process compatible with standard manufacturing techniques.